Questo sito web utilizza i cookie. Utilizzando questo sito, acconsenti all'utilizzo dei cookie. Per ulteriori informazioni, dai un'occhiata al nostro politica sulla riservatezza.

Le immagini servono solo come riferimento,

Vedi Specifiche Tecniche

GAL16V8D-25LPN +BOM

Fast EE PLD with 25ns performance

Produttore:

LATTICE SEMICONDUCTOR CORP
ProduttorePart #:

GAL16V8D-25LPN
Scheda dati:

GAL16V8D-25LPN Scheda dati (PDF)
Pbfree Code:

Yes
Part Life Cycle Code:

Obsolete
Pin Count:

20
ECCN Code:

EAR99
EDA/CAD Modelli:

Richiedi modelli CAD gratuiti per GAL16V8D-25LPN

E-mail: [email protected]

Skype: live:.cid.ab6b29428937b76

tel: +852 95804164

GAL16V8D-25LPN Descrizione generale

GAL®16V8 Programmable Logic Device (PLD) IC 8 Macrocells 20-PDIP

Caratteristiche principali

HIGH PERFORMANCE E2CMOS®TECHNOLOGY
—3.5 ns Maximum Propagation Delay
—Fmax = 250 MHz
—3.0 ns Maximum from Clock Input to Data Output
—UltraMOS®
Advanced CMOS Technology
50% to 75% REDUCTION IN POWER FROM BIPOLAR
—75mA Typ Icc on Low Power Device
—45mA Typ Icc on Quarter Power Device
ACTIVE PULL-UPS ON ALL PINS
E2CELL TECHNOLOGY
—Reconfigurable Logic
—Reprogrammable Cells
—100% Tested/100% Yields
—High Speed Electrical Erasure (<100ms)
—20 Year Data Retention
EIGHT OUTPUT LOGIC MACROCELLS
—Maximum Flexibility for Complex Logic Designs
—Programmable Output Polarity
—Also Emulates 20-pin PAL®
Devices with Full
Function/Fuse Map/Parametric Compatibility
PRELOAD AND POWER-ON RESET OF ALL REGISTERS
—100% Functional Testability
APPLICATIONS INCLUDE:
—DMA Control
—State Machine Control
—High Speed Graphics Processing
—Standard Logic Speed Upgrade
ELECTRONIC SIGNATURE FOR IDENTIFICATION
LEAD-FREE PACKAGE OPTIONS

Specifiche

Pbfree Code	Yes	Part Life Cycle Code	Obsolete
Pin Count	20	Reach Compliance Code
ECCN Code	EAR99	HTS Code	8542.39.00.01
Architecture	PAL-TYPE	Clock Frequency-Max	37 MHz
JESD-30 Code	R-PDIP-T20	JESD-609 Code	e3
Length	26.162 mm	Number of Dedicated Inputs	8
Number of I/O Lines	8	Number of Inputs	18
Number of Outputs	8	Number of Product Terms	64
Number of Terminals	20	Operating Temperature-Max	70 °C
Operating Temperature-Min		Organization	8 DEDICATED INPUTS, 8 I/O
Output Function	MACROCELL	Peak Reflow Temperature (Cel)	260
Power Supplies	5 V	Programmable Logic Type	EE PLD
Propagation Delay	25 ns	Qualification Status	Not Qualified
Seated Height-Max	5.334 mm	Supply Voltage-Max	5.25 V
Supply Voltage-Min	4.75 V	Supply Voltage-Nom	5 V
Surface Mount	NO	Technology	CMOS
Temperature Grade	COMMERCIAL	Terminal Finish	MATTE TIN
Terminal Form	THROUGH-HOLE	Terminal Pitch	2.54 mm
Terminal Position	DUAL	Time@Peak Reflow Temperature-Max (s)	30
Width	7.62 mm

Politiche di servizio e altro

Relativi al servizio post-vendita e alla liquidazione

Pagamento

Metodo di pagamento

TT/bonifico bancario

PayPal

Western Union

Grammo dei soldi

Per canali di pagamento alternativi, contattaci a:

[email protected]

Spedizione e imballaggio

metodo di spedizione

Fedex

UPS

DHL

NTN

Imballaggio

AVAQ determina e confeziona tutti i dispositivi in base ai requisiti di protezione contro le scariche elettrostatiche (ESD) e il livello di sensibilità all'umidità (MSL)..