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Vedi Specifiche Tecniche

SN65LVDS104D +BOM

1:4 LVDS clock fanout buffer

Produttore:

Texas Instruments, Inc
ProduttorePart #:

SN65LVDS104D
Scheda dati:

SN65LVDS104D Scheda dati (PDF)
Function:

Receiver, Repeater
Protocols:

LVDS
Number Of Transmitters:

4
Number Of Receivers:

1
EDA/CAD Modelli:

Richiedi modelli CAD gratuiti per SN65LVDS104D

SN65LVDS104D Descrizione generale

The SN65LVDS104D is a reliable IC clock buffer specifically designed for differential line receiver applications. With a peak-to-peak jitter maximum of 147ps, this device ensures precise signal transmission without introducing any unwanted noise or distortion. Operating within a temperature range of -40°C to 85°C, the SN65LVDS104D is highly versatile and suitable for a wide range of environments

Caratteristiche principali

Receiver and Drivers Meet or Exceed the
Requirements of ANSI EIA/TIA-644 Standard
- SN65LVDS105 Receives Low-Voltage TTL
  (LVTTL) Levels
- SN65LVDS104 Receives Differential Input
  Levels, ±100 mV
Typical Data Signaling Rates to 400 Mbps or
Clock Frequencies to 400 MHz
Operates From a Single 3.3-V Supply
Low-Voltage Differential Signaling With Typical
Output Voltage of 350 mV and a 100-Ω Load
Propagation Delay Time
- SN65LVDS105 – 2.2 ns (Typ)
- SN65LVDS104 – 3.1 ns (Typ)
LVTTL Levels Are 5-V Tolerant
Electrically Compatible With LVDS, PECL,
LVPECL, LVTTL, LVCMOS, GTL, BTL, CTT,
SSTL, or HSTL Outputs With External Networks
Driver Outputs Are High-Impedance When
Disabled or With V_CC <1.5 V
Bus-Pin ESD Protection Exceeds 16 kV
SOIC and TSSOP Packaging

Specifiche

Function	Receiver, Repeater	Protocols	LVDS
Number of transmitters	4	Number of receivers	1
Supply voltage (V)	3.3	Signaling rate (MBits)	400
Input signal	LVDS	Output signal	BTL, CTT, GTL, HSTL, LVCMOS, LVDS, LVPECL, LVTTL, PECL, SSTL
Rating	Catalog	Operating temperature range (°C)	-40 to 85
feature-function	Repeater	feature-number-of-drivers	4
feature-number-of-receivers	4	feature-number-of-elements-per-chip
feature-transmission-data-rate-mbps	400	feature-maximum-propagation-delay-time-ns	4.2
feature-input-signal-type	LVDS\|LVTTL	feature-differential-input-low-threshold-voltage-v	-0.1(Min)
feature-differential-input-high-threshold-voltage-v	0.1(Max)	feature-maximum-differential-output-voltage-v	0.454
feature-maximum-input-current-ua	35	feature-supplier-temperature-grade
feature-packaging	Tube	feature-rad-hard
feature-pin-count	16	feature-cecc-qualified	No
feature-esd-protection	Yes	feature-escc-qualified
feature-military	No	feature-aec-qualified	No
feature-aec-qualified-number		feature-eccn-code	EAR99
feature-svhc	No	feature-svhc-exceeds-threshold	No

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