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Vedi Specifiche Tecniche

ISP1181ABS +BOM

This versatile chip enables seamless integration of USB devices into various applications

Produttore:

PHILIPS SEMICONDUCTORS
ProduttorePart #:

ISP1181ABS
Scheda dati:

ISP1181ABS Scheda dati (PDF)
Part Life Cycle Code:

Transferred
HTS Code:

8542.31.00.01
JESD-30 Code:

S-PQCC-N48
JESD-609 Code:

e3
EDA/CAD Modelli:

Richiedi modelli CAD gratuiti per ISP1181ABS

E-mail: [email protected]

Skype: live:.cid.ab6b29428937b76

tel: +852 95804164

Caratteristiche principali

Complies with Universal Serial Bus Specification Rev. 2.0 and most Device Class specifications
Supports data transfer at full-speed (12 Mbit/s)
High performance USB peripheral controller with integrated Serial Interface Engine (SIE), FIFO memory, transceiver and 3.3 V voltage regulator
High speed (11.1 Mbyte/s or 90 ns read/write cycle) parallel interface
Fully autonomous and multi-configuration DMA operation
Up to 14 programmable USB endpoints with 2 fixed control IN/OUT endpoints
Integrated physical 2462 bytes of multi-configuration FIFO memory
Endpoints with double buffering to increase throughput and ease real-time data transfer
Seamless interface with most microcontrollers/microprocessors
Bus-powered capability with low power consumption and low ‘suspend’ current
6 MHz crystal oscillator input with integrated PLL for low EMI
Controllable LazyClock (100 kHz ± 50 %) output during ‘suspend’
Software controlled connection to the USB bus (SoftConnect™)
Good USB connection indicator that blinks with traffic (GoodLink™)
Clock output with programmable frequency (up to 48 MHz)
Complies with the ACPI™, OnNow™ and USB power management requirements
Internal power-on and low-voltage reset circuit, with possibility of a software reset
Operation over the extended USB bus voltage range (4.0 V to 5.5 V) with 5 V tolerant I/O pads
Operating temperature range −40 °C to +85 °C
Full-scan design with high fault coverage
Available in TSSOP48 and HVQFN48 packages.

Specifiche

Part Life Cycle Code	Transferred	Reach Compliance Code
HTS Code	8542.31.00.01	JESD-30 Code	S-PQCC-N48
JESD-609 Code	e3	Number of Terminals	48
Operating Temperature-Max	85 °C	Operating Temperature-Min	-40 °C
Power Supplies	3.3/5 V	Qualification Status	Not Qualified
Surface Mount	YES	Technology	CMOS
Temperature Grade	INDUSTRIAL	Terminal Finish	Matte Tin (Sn)
Terminal Form	NO LEAD	Terminal Pitch	0.5 mm
Terminal Position	QUAD

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AVAQ determina e confeziona tutti i dispositivi in base ai requisiti di protezione contro le scariche elettrostatiche (ESD) e il livello di sensibilità all'umidità (MSL)..