Questo sito web utilizza i cookie. Utilizzando questo sito, acconsenti all'utilizzo dei cookie. Per ulteriori informazioni, dai un'occhiata al nostro politica sulla riservatezza.

Le immagini servono solo come riferimento,

Vedi Specifiche Tecniche

HEF4555BT,653 +BOM

1-of-4 decoder/demultiplexer

Produttore:

Nexperia Semiconductor (NXP)
ProduttorePart #:

HEF4555BT,653
Scheda dati:

HEF4555BT,653 Scheda dati (PDF)
Feature-logic-family:

HEF4000
Feature-logic-function:

Decoder/Demultiplexer
Feature-number-of-elements-per-chip:

2
Feature-process-technology:

CMOS
EDA/CAD Modelli:

Richiedi modelli CAD gratuiti per HEF4555BT,653

E-mail: [email protected]

Skype: live:.cid.ab6b29428937b76

tel: +852 95804164

HEF4555BT,653 Descrizione generale

The HEF4555B contains two 1-of-4 decoders/demultiplexers. Each has two address inputs (nA0 and nA1, an active LOW enable input (n) and four mutually exclusive outputs which are active HIGH (nY0 to nY3). When used as a decoder, n when HIGH, forces nY0 to nY3 LOW. When used as a demultiplexer, the appropriate output is selected by the information on nA0 and nA1 with n as data input. All unselected outputs are LOW.It operates over a recommended V power supply range of 3 V to 15 V referenced to V (usually ground). Unused inputs must be connected to V, V, or another input.

Caratteristiche principali

Wide supply voltage range from 3.0 V to 15.0 V
CMOS low power dissipation
High noise immunity
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Complies with JEDEC standard JESD 13-B
ESD protection:HBM JESD22-A114F exceeds 2000 VMM JESD22-A115-B exceeds 200 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
Specified from -40 °C to +85 °C

Nexperia Semiconductor (NXP) Stock originale

Applicazione

Code conversion
Address decoding
Demultiplexing: when using the enable input as data input

Specifiche

feature-logic-family	HEF4000	feature-logic-function	Decoder/Demultiplexer
feature-number-of-elements-per-chip	2	feature-process-technology	CMOS
feature-maximum-operating-supply-voltage-v	15	feature-maximum-high-level-output-current-ma	-3.6
feature-output-type		feature-maximum-low-level-output-current-ma	3.6
feature-packaging	Tape and Reel	feature-minimum-operating-supply-voltage-v	3
feature-rad-hard		feature-pin-count	16
feature-cecc-qualified	No	feature-esd-protection
feature-military	No	feature-aec-qualified	Yes
feature-aec-qualified-number		feature-auto-motive
feature-p-pap		feature-eccn-code	EAR99
feature-svhc	No	feature-svhc-exceeds-threshold	No

Politiche di servizio e altro

Relativi al servizio post-vendita e alla liquidazione

Pagamento

Metodo di pagamento

TT/bonifico bancario

PayPal

Western Union

Grammo dei soldi

Per canali di pagamento alternativi, contattaci a:

[email protected]

Spedizione e imballaggio

metodo di spedizione

Fedex

UPS

DHL

NTN

Imballaggio

AVAQ determina e confeziona tutti i dispositivi in base ai requisiti di protezione contro le scariche elettrostatiche (ESD) e il livello di sensibilità all'umidità (MSL)..