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EP20K200RI240-2 +BOM

FPGA APEX 20K Family 200K Gates 8320 Cells 200MHz 0.22um Technology 2.5V 240-Pin RQFP

Produttore:

Intel Corp
ProduttorePart #:

EP20K200RI240-2
Scheda dati:

EP20K200RI240-2 Scheda dati (PDF)
Feature-family-name:

APEX 20K
Feature-process-technology:

0.22um
Feature-maximum-number-of-user-i-os:

174
Feature-device-logic-cells:

8320
EDA/CAD Modelli:

Richiedi modelli CAD gratuiti per EP20K200RI240-2

EP20K200RI240-2 Descrizione generale

APEXTM 20K devices are the first PLDs designed with the MultiCore architecture, which combines the strengths of LUT-based and productterm-based devices with an enhanced memory structure. LUT-based logic provides optimized performance and efficiency for data-path, registerintensive, mathematical, or digital signal processing (DSP) designs. Product-term-based logic is optimized for complex combinatorial paths, such as complex state machines. LUT- and product-term-based logic combined with memory functions and a wide variety of MegaCore and AMPP functions make the APEX 20K device architecture uniquely suited for system-on-a-programmable-chip designs. Applications historically requiring a combination of LUT-, product-term-, and memory-based devices can now be integrated into one APEX 20K device.

Specifiche

feature-family-name	APEX 20K	feature-process-technology	0.22um
feature-maximum-number-of-user-i-os	174	feature-number-of-registers
feature-device-logic-cells	8320	feature-device-system-gates	526000
feature-number-of-multipliers		feature-program-memory-type	SRAM
feature-ram-bits-kbit	104	feature-total-number-of-block-ram	52
feature-ethernet-macs		feature-supported-ip-core
feature-supported-ip-core-manufacture		feature-maximum-number-of-serdes-channels
feature-device-logic-units	8320	feature-device-number-of-dlls-plls	1
feature-transceiver-blocks		feature-transceiver-speed-gbps
feature-dedicated-dsp		feature-pci-blocks
feature-programmability	No	feature-maximum-internal-frequency-mhz	200
feature-speed-grade	2	feature-giga-multiply-accumulates-per-second
feature-differential-i-o-standards-supported	CTT\|AGP\|PCI-X\|LVDS\|LVPECL	feature-single-ended-i-o-standards-supported	LVCMOS\|LVTTL
feature-external-memory-interface	ZBT SRAM\|DDR SDRAM	feature-minimum-operating-supply-voltage-v	2.375
feature-maximum-operating-supply-voltage-v	2.625	feature-packaging
feature-rad-hard		feature-pin-count	240
feature-cecc-qualified	No	feature-esd-protection
feature-escc-qualified		feature-military	No
feature-aec-qualified	No	feature-aec-qualified-number
feature-auto-motive	No	feature-p-pap	No
feature-eccn-code	3A991	feature-svhc	Yes
feature-svhc-exceeds-threshold	No

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