Questo sito web utilizza i cookie. Utilizzando questo sito, acconsenti all'utilizzo dei cookie. Per ulteriori informazioni, dai un'occhiata al nostro politica sulla riservatezza.

Le immagini servono solo come riferimento,

Vedi Specifiche Tecniche

XCS30XL-4TQ144C +BOM

FPGA XCS30XL-4TQ144C offers 576 CLBs, 10000 gates, and a clock frequency of 217 MHz, all housed in a PQFP144 casing

Produttore:

XILINX
ProduttorePart #:

XCS30XL-4TQ144C
Scheda dati:

XCS30XL-4TQ144C Scheda dati (PDF)
Part Life Cycle Code:

Obsolete
Pin Count:

144
Reach Compliance Code:

not_compliant
HTS Code:

8542.39.00.01
EDA/CAD Modelli:

Richiedi modelli CAD gratuiti per XCS30XL-4TQ144C

E-mail: [email protected]

Skype: live:.cid.ab6b29428937b76

tel: +852 95804164

XCS30XL-4TQ144C Descrizione generale

Xilinx's XCS30XL-4TQ144C FPGA is a standout member of the CoolRunner XPLA3 family, known for its advanced features and robust performance. Boasting 1500 logic cells, this FPGA empowers designers to unleash their creativity in implementing a diverse range of digital circuits and functions. With 84 user I/O pins, seamless interfacing with external devices and peripherals is guaranteed, making it an ideal choice for demanding applications. Running on a supply voltage range of 1.5V to 3.6V, the XCS30XL-4TQ144C offers unparalleled flexibility and adaptability. Operating at a speed grade of 4, it delivers consistent performance at high operating frequencies, meeting the stringent requirements of modern digital systems. The FPGA's convenient JTAG interface simplifies the configuration process, allowing users to program the device according to their unique specifications. Moreover, its built-in security features provide peace of mind, ensuring the integrity of the configuration bitstream against unauthorized access and potential tampering. In conclusion, the XCS30XL-4TQ144C excels as a cutting-edge FPGA solution, catering to the diverse needs of today's design and engineering challenges

Specifiche

Part Life Cycle Code	Obsolete	Pin Count	144
Reach Compliance Code	not_compliant	HTS Code	8542.39.00.01
Additional Feature	MAXIMUM USABLE GATES 30000	Clock Frequency-Max	217 MHz
Combinatorial Delay of a CLB-Max	1.1 ns	JESD-30 Code	S-PQFP-G144
JESD-609 Code	e0	Length	20 mm
Moisture Sensitivity Level	3	Number of CLBs	576
Number of Equivalent Gates	10000	Number of Inputs	196
Number of Logic Cells	576	Number of Outputs	196
Number of Terminals	144	Operating Temperature-Max	85 °C
Operating Temperature-Min		Organization	576 CLBS, 10000 GATES
Peak Reflow Temperature (Cel)	225	Programmable Logic Type	FIELD PROGRAMMABLE GATE ARRAY
Qualification Status	Not Qualified	Seated Height-Max	1.6 mm
Supply Voltage-Max	3.6 V	Supply Voltage-Min	3 V
Supply Voltage-Nom	3.3 V	Surface Mount	YES
Technology	CMOS	Temperature Grade	OTHER
Terminal Finish	Tin/Lead (Sn85Pb15)	Terminal Form	GULL WING
Terminal Pitch	0.5 mm	Terminal Position	QUAD
Time@Peak Reflow Temperature-Max (s)	30	Width	20 mm

Politiche di servizio e altro

Relativi al servizio post-vendita e alla liquidazione

Pagamento

Metodo di pagamento

TT/bonifico bancario

PayPal

Western Union

Grammo dei soldi

Per canali di pagamento alternativi, contattaci a:

[email protected]

Spedizione e imballaggio

metodo di spedizione

Fedex

UPS

DHL

NTN

Imballaggio

AVAQ determina e confeziona tutti i dispositivi in base ai requisiti di protezione contro le scariche elettrostatiche (ESD) e il livello di sensibilità all'umidità (MSL)..