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S1D13700F02A100 +BOM

Display driver and controller for QVGA resolution grayscale STN LCD panel

Produttore:

Epson Electronics America Inc-Semiconductor Div
ProduttorePart #:

S1D13700F02A100
Scheda dati:

S1D13700F02A100 Scheda dati (PDF)
Part Life Cycle Code:

Active
Reach Compliance Code:

compliant
ECCN Code:

EAR99
HTS Code:

8542.31.00.01
EDA/CAD Modelli:

Richiedi modelli CAD gratuiti per S1D13700F02A100

S1D13700F02A100 Descrizione generale

Designed for efficiency and versatility, the Epson S1D13700F02A100 graphic display controller caters to the needs of small to medium-sized LCD panels in a range of industries. Supporting resolutions up to 320x240 pixels, this controller ensures top-quality graphics for industrial, medical, and consumer electronic devices. The integrated display RAM optimizes the workload on the host microcontroller, resulting in improved system performance. With interface options like SPI and parallel interface, the S1D13700F02A100 offers seamless integration capabilities for different system configurations. Its advanced features, including hardware scrolling and transparency control, enable fluid animation and layered effects on the display, elevating the visual experience for users. The S1D13700F02A100 is a reliable and feature-rich solution for driving exceptional graphics on LCD panels across a range of applications

Caratteristiche principali

Internal Memory
Embedded 32K bytes of SRAM display memory
Host CPU Interface
Direct Address Bus support for:
Generic Bus (Z80 family) microprocessor interface
MC68K family microprocessor interface
Indirect Address Bus support for:
Generic Bus (Z80 family) microprocessor interface
MC68K family microprocessor interface
M6800 family microprocessor interface
8-bit CPU data bus interface
Display Support
4-bit monochrome LCD interface
Maximum resolutions supported: 640x240 at 1 bpp 320x240 at 2 bpp 240x160 at 4 bpp
1/2-duty to 1/256-duty LCD drive
Display Modes
1/2/4 bit-per-pixel color depth support
Text, graphics and combined text/graphics display modes
Three overlapping screens in graphics mode
Programmable cursor control
Smooth horizontal scrolling of all or part of the display in monochrome mode
Smooth vertical scrolling of all or part of the display in all modes
Character Generation
160, 5x7 pixel characters in embedded mask-programmed character generator ROM (CGROM)
Up to 64, 8x8 pixel characters in character generator RAM (CGRAM)
Up to 256, 8x16 pixel characters in embedded character generator RAM (when CGROM is not used)
Software initiated power save mode
Low power consumption
CORE VDD 3.0 to 3.6 volts
IO VDD 3.0 to 5.5 volts
Clock Source
Two terminal crystal or Single Oscillator input Input Clock (maximum 60 MHz) FPSHIFT Clock (maximum 15 MHz)
Package
TQFP13 - 64-pin Pb-used package
TQFP13 - 64-pin Pb-free package (lead free)

Specifiche

Part Life Cycle Code	Active	Reach Compliance Code	compliant
ECCN Code	EAR99	HTS Code	8542.31.00.01
Address Bus Width	16	Clock Frequency-Max	10 MHz
Display Configuration	320 X 240 PIXELS	External Data Bus Width	8
JESD-30 Code	S-PQFP-G64	JESD-609 Code	e3
Length	10.2 mm	Moisture Sensitivity Level	2A
Number of Terminals	64	Operating Temperature-Max	85 °C
Operating Temperature-Min	-40 °C	Peak Reflow Temperature (Cel)	255
Qualification Status	Not Qualified	Seated Height-Max	1.2 mm
Supply Voltage-Max	3.6 V	Supply Voltage-Min	3 V
Supply Voltage-Nom	3.3 V	Surface Mount	YES
Technology	CMOS	Temperature Grade	INDUSTRIAL
Terminal Finish	Tin (Sn)	Terminal Form	GULL WING
Terminal Pitch	0.5 mm	Terminal Position	QUAD
Time@Peak Reflow Temperature-Max (s)	10	Width	10.2 mm
uPs/uCs/Peripheral ICs Type	DISPLAY CONTROLLER, CRT OR FLAT PANEL GRAPHICS DISPLAY

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