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LMK04828BISQE/NOPB +BOM

Clock Generator 0.001MHz to 750MHz-IN 3100MHz-OUT 64-Pin WQFN EP T/R

Produttore:

TI/NS
ProduttorePart #:

LMK04828BISQE/NOPB
Scheda dati:

LMK04828BISQE/NOPB Scheda dati (PDF)
Function:

Dual-loop PLL
Number Of Outputs:

15
RMS Jitter (fs):

88
Output Frequency (min) (MHz):

0.289
EDA/CAD Modelli:

Richiedi modelli CAD gratuiti per LMK04828BISQE/NOPB

LMK04828BISQE/NOPB Descrizione generale

From its advanced dual-loop PLLatinum™ PLL architecture to its programmable output types including LVPECL and LVDS, the LMK04828BISQE/NOPB offers a comprehensive solution for demanding clocking requirements. Its maximum clock output frequency of 3.1 GHz ensures compatibility with a variety of applications, while the support for up to 14 device clocks and 7 SYSREF clocks enhances its adaptability in complex systems. With integrated features and a compact package, this device excels in delivering superior jitter performance and precision in diverse industries

Caratteristiche principali

JEDEC JESD204B Support
Ultra-Low RMS Jitter
- 88 fs RMS Jitter (12 kHz to 20 MHz)
- 91 fs RMS Jitter (100 Hz to 20 MHz)
- –162.5 dBc/Hz Noise Floor at 245.76 MHz
Up to 14 Differential Device Clocks from PLL2
- Up to 7 SYSREF Clocks
- Maximum Clock Output Frequency 3.1 GHz
- LVPECL, LVDS, HSDS, LCPECL Programmable Outputs from PLL2
Up to 1 Buffered VCXO/Crystal Output from PLL1
- LVPECL, LVDS, 2xLVCMOS Programmable
Dual Loop PLLatinum™ PLL Architecture
PLL1
- Up to 3 Redundant Input Clocks
  - Automatic and Manual Switch-Over Modes
  - Hitless Switching and LOS
- Integrated Low-Noise Crystal Oscillator Circuit
- Holdover Mode When Input Clocks are Lost
PLL2
- Normalized [1 Hz] PLL Noise Floor of
  –227 dBc/Hz
- Phase Detector Rate up to 155 MHz
- OSCin Frequency-Doubler
- Two Integrated Low-Noise VCOs
50% Duty Cycle Output Divides, 1 to 32
(even and odd)
Precision Digital Delay, Dynamically Adjustable
25-ps Step Analog Delay
Multi-Mode: Dual PLL, Single PLL, and Clock Distribution
Industrial Temperature Range: –40 to 85°C
Supports 105°C PCB Temperature (Measured at Thermal Pad)
3.15-V to 3.45-V Operation
Package: 64-Pin QFN (9.0 mm × 9.0 mm × 0.8 mm)

Specifiche

Function	Dual-loop PLL	Number of outputs	15
RMS jitter (fs)	88	Output frequency (min) (MHz)	0.289
Output frequency (max) (MHz)	3080	Input type	LVCMOS, LVDS, LVPECL
Output type	LVCMOS, LVDS, LVPECL	Supply voltage (min) (V)	3.15
Supply voltage (max) (V)	3.45	Features	JESD204B
Rating	Catalog	Operating temperature range (°C)	-40 to 85
Number of input channels	3

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