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LCMXO2-7000HC-4TG144I +BOM

MachXO2 CPLD Family

Produttore:

Lattice Semiconductor Corporation
ProduttorePart #:

LCMXO2-7000HC-4TG144I
Scheda dati:

LCMXO2-7000HC-4TG144I Scheda dati (PDF)
Pbfree Code:

Yes
Part Life Cycle Code:

Active
Reach Compliance Code:

compliant
ECCN Code:

EAR99
EDA/CAD Modelli:

Richiedi modelli CAD gratuiti per LCMXO2-7000HC-4TG144I

LCMXO2-7000HC-4TG144I Descrizione generale

The LCMXO2-7000HC-4TG144I from Lattice Semiconductor is a versatile programmable logic device that offers a perfect balance of high density and low power consumption. With a generous 7000 Look-Up Tables (LUTs) and 128 kbits of block RAM, this device is well-equipped to handle a wide range of logic functions. Its 160 user I/Os provide flexibility for various applications, making it a versatile choice for designers

Caratteristiche principali

Flexible Logic Architecture
Six devices with 256 to 6864 LUT4s and 19 to 335 I/Os
Ultra Low Power Devices
Advanced 65 nm low power process
As low as 19 µW standby power
Programmable low swing differential I/Os
Stand-by mode and other power saving options
Embedded and Distributed Memory
Up to 240 Kbits sysMEM™ Embedded Block RAM
Up to 54 Kbits Distributed RAM
Dedicated FIFO control logic On-Chip User Flash Memory
Up to 256 Kbits of User Flash Memory
100,000 write cycles
Accessible through WISHBONE, SPI, I2C and JTAG interfaces
Can be used as soft processor PROM or as Flash memory
Pre-Engineered Source Synchronous I/O
DDR registers in I/O cells
Dedicated gearing logic
7:1 Gearing for Display I/Os
Generic DDR, DDRX2, DDRX4
Dedicated DDR/DDR2/LPDDR memory with DQS support
High Performance, Flexible I/O Buffer
Programmable sysIO™ buffer supports wide range of interfaces:
– LVCMOS 3.3/2.5/1.8/1.5/1.2
– LVTTL
–PCI
– LVDS, Bus-LVDS, MLVDS, RSDS, LVPECL
– SSTL 25/18
– HSTL 18
– Schmitt trigger inputs, up to 0.5V hysteresis
I/Os support hot socketing
On-chip differential termination
Programmable pull-up or pull-down mode

Specifiche

Pbfree Code	Yes	Part Life Cycle Code	Active
Reach Compliance Code	compliant	ECCN Code	EAR99
HTS Code	8542.39.00.01	Additional Feature	ALSO OPERATES AT 3.3 V NOMINAL SUPPLY
JESD-30 Code	S-PQFP-G144	JESD-609 Code	e3
Length	20 mm	Moisture Sensitivity Level	3
Number of Inputs	114	Number of Logic Cells	6864
Number of Outputs	114	Number of Terminals	144
Operating Temperature-Max	100 °C	Operating Temperature-Min	-40 °C
Packing Method	TRAY	Peak Reflow Temperature (Cel)	260
Programmable Logic Type	FIELD PROGRAMMABLE GATE ARRAY	Qualification Status	Not Qualified
Seated Height-Max	1.6 mm	Supply Voltage-Max	3.465 V
Supply Voltage-Min	2.375 V	Supply Voltage-Nom	2.5 V
Surface Mount	YES	Terminal Finish	Matte Tin (Sn)
Terminal Form	GULL WING	Terminal Pitch	0.5 mm
Terminal Position	QUAD	Time@Peak Reflow Temperature-Max (s)	30
Width	20 mm

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