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LC4512B-35FT256C +BOM

CPLD - Complex Programmable Logic Devices ispJTAG 2.5V 3.5ns 512MC 208 I/O

Produttore:

Lattice Semiconductor Corp
ProduttorePart #:

LC4512B-35FT256C
Scheda dati:

LC4512B-35FT256C Scheda dati (PDF)
Series:

ispMACH® 4000B
Programmable:

Not Verified
Programmable Type:

In System Programmable
Delay Time Tpd(1) Max:

3.5 ns
EDA/CAD Modelli:

Richiedi modelli CAD gratuiti per LC4512B-35FT256C

LC4512B-35FT256C Descrizione generale

The high performance ispMACH 4000 family from Lattice offers a SuperFAST CPLD solution. The family is a blend of Lattice’s two most popular architectures: the ispLSI® 2000 and ispMACH 4A. Retaining the best of both families, the ispMACH 4000 architecture focuses on significant innovations to combine the highest performance with low power in a flexible CPLD family.

The ispMACH 4000 combines high speed and low power with the flexibility needed for ease of design. With its robust Global Routing Pool and Output Routing Pool, this family delivers excellent First-Time-Fit, timing predictability, routing, pin-out retention and density migration.

The ispMACH 4000 family offers densities ranging from 32 to 512 macrocells. There are multiple density-I/O combinations in Thin Quad Flat Pack (TQFP), Chip Scale BGA (csBGA) and Fine Pitch Thin BGA (ftBGA) packages ranging from 44 to 256 pins/balls. Table 1 shows the macrocell, package and I/O options, along with other key parameters.

The ispMACH 4000 family has enhanced system integration capabilities. It supports 3.3V (4000V), 2.5V (4000B) and 1.8V (4000C/Z) supply voltages and 3.3V, 2.5V and 1.8V interface voltages. Additionally, inputs can be safely driven up to 5.5V when an I/O bank is configured for 3.3V operation, making this family 5V tolerant. The ispMACH 4000 also offers enhanced I/O features such as slew rate control, PCI compatibility, bus-keeper latches, pull-up resistors, pull-down resistors, open drain outputs and hot socketing. The ispMACH 4000 family members are 3.3V/ 2.5V/1.8V in-system programmable through the IEEE Standard 1532 interface. IEEE Standard 1149.1 boundary scan testing capability also allows product testing on automated test equipment. The 1532 interface signals TCK, TMS, TDI and TDO are referenced to VCC (logic core).

Lattice Semiconductor Corp Stock originale

Specifiche

Category	Integrated Circuits (ICs)EmbeddedCPLDs (Complex Programmable Logic Devices)	Series	ispMACH® 4000B
Programmable	Not Verified	Programmable Type	In System Programmable
Delay Time tpd(1) Max	3.5 ns	Voltage Supply - Internal	2.3V ~ 2.7V
Number of Logic Elements/Blocks	32	Number of Macrocells	512
Number of I/O	208	Operating Temperature	0°C ~ 90°C (TJ)
Mounting Type	Surface Mount	Base Product Number	LC4512

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