Questo sito web utilizza i cookie. Utilizzando questo sito, acconsenti all'utilizzo dei cookie. Per ulteriori informazioni, dai un'occhiata al nostro politica sulla riservatezza.

Le immagini servono solo come riferimento,

Vedi Specifiche Tecniche

CY7C028V-20AI +BOM

CY7C028V-20AI is a 3.3V 64Kx16 asynchronous dual port SRAM

Produttore:

Cypress Semiconductor Corp
ProduttorePart #:

CY7C028V-20AI
Scheda dati:

CY7C028V-20AI Scheda dati (PDF)
Pbfree Code:

No
Part Life Cycle Code:

Obsolete
Pin Count:

100
Reach Compliance Code:

compliant
EDA/CAD Modelli:

Richiedi modelli CAD gratuiti per CY7C028V-20AI

CY7C028V-20AI Descrizione generale

With its impressive 256Kx9-bit capacity and fast operating speed of 20ns, the CY7C028V-20AI is a standout choice for those seeking a high-performance synchronous SRAM chip. Designed for versatility, this chip is suitable for a variety of applications, including telecommunications, networking, and industrial control systems. Its low power consumption and wide voltage range of 3V to 3.6V further enhance its appeal, ensuring efficient energy use and compatibility with a range of systems. Whether you're working on a telecommunications infrastructure or an industrial automation solution, the CY7C028V-20AI is well-equipped to meet your needs with its impressive performance and reliability

Caratteristiche principali

True Dual-Ported memory cells which allow simultaneous access of the same memory location
32K x 16 organization (CY7C027V/027VN/027AV [1])
64K x 16 organization (CY7C028V)
32K x 18 organization (CY7C037V/037AV[2])
64K x 18 organization (CY7C038V)
0.35 micron CMOS for optimum speed and power
High speed access: 15, 20, and 25 ns
Low operating power
Active: ICC = 115 mA (typical)
Standby: ISB3 = 10 μA (typical)
Fully asynchronous operation
Automatic power down
Expandable data bus to 32/36 bits or more using Master/Slave chip select when using more than one device
On-chip arbitration logic
Semaphores included to permit software handshaking between ports
INT flag for port-to-port communication
Separate upper-byte and lower-byte control
Dual chip enables
Pin select for Master or Slave
Commercial and Industrial temperature ranges
100-pin Pb-free TQFP and 100-pin TQFP

Specifiche

Pbfree Code	No	Part Life Cycle Code	Obsolete
Pin Count	100	Reach Compliance Code	compliant
ECCN Code	3A991.B.2.B	HTS Code	8542.32.00.41
Access Time-Max	20 ns	Additional Feature	AUTOMATIC POWER-DOWN
I/O Type	COMMON	JESD-30 Code	S-PQFP-G100
JESD-609 Code	e0	Length	14 mm
Memory Density	1048576 bit	Memory IC Type	MULTI-PORT SRAM
Memory Width	16	Moisture Sensitivity Level	3
Number of Functions	1	Number of Ports	2
Number of Terminals	100	Number of Words	65536 words
Number of Words Code	64000	Operating Mode	ASYNCHRONOUS
Operating Temperature-Max	85 °C	Operating Temperature-Min	-40 °C
Organization	64KX16	Output Characteristics	3-STATE
Parallel/Serial	PARALLEL	Qualification Status	Not Qualified
Seated Height-Max	1.6 mm	Standby Current-Max	0.00005 A
Standby Voltage-Min	2 V	Supply Current-Max	0.195 mA
Supply Voltage-Max (Vsup)	3.6 V	Supply Voltage-Min (Vsup)	3 V
Supply Voltage-Nom (Vsup)	3.3 V	Surface Mount	YES
Technology	CMOS	Temperature Grade	INDUSTRIAL
Terminal Finish	TIN LEAD	Terminal Form	GULL WING
Terminal Pitch	0.5 mm	Terminal Position	QUAD
Width	14 mm

Politiche di servizio e altro

Relativi al servizio post-vendita e alla liquidazione

Pagamento

Metodo di pagamento

TT/bonifico bancario

PayPal

Western Union

Grammo dei soldi

Per canali di pagamento alternativi, contattaci a:

[email protected]

Spedizione e imballaggio

metodo di spedizione

Fedex

UPS

DHL

NTN

Imballaggio

AVAQ determina e confeziona tutti i dispositivi in base ai requisiti di protezione contro le scariche elettrostatiche (ESD) e il livello di sensibilità all'umidità (MSL)..