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AT91SO100 +BOM

Secure ARM Microcontroller for data-sensitive applications

Caratteristiche principali

  • 400 MHz ARM926EJ-S™ ARM® Thumb® Processor
  • – 32 Kbytes Data Cache, 32 Kbytes Instruction Cache, MMU
  • Memories
  • – DDR2 Controller 4-bank DDR2/LPDDR, SDRAM/LPSDR
  • – External Bus Interface supporting 4-bank DDR2/LPDDR, SDRAM/LPSDR, Static Memories, CompactFlash, SLC NAND Flash with ECC
  • – One 64-Kbyte internal SRAM, single-cycle access at system speed or processor speed through TCM interface
  • – One 64-Kbyte internal ROM, embedding bootstrap routine
  • Peripherals
  • – LCD Controller supporting STN and TFT displays up to 1280860
  • – ITU-R BT. 601/656 Image Sensor Interface
  • – USB Device High Speed, USB Host High Speed and USB Host Full Speed with On-Chip Transceiver
  • – 10/100 Mbps Ethernet MAC Controller
  • – Two High Speed Memory Card Hosts (SDIO, SDCard, MMC)
  • – AC97 controller
  • – Two Master/Slave Serial Peripheral Interfaces
  • – Two Three-channel 16-bit Timer/Counters
  • – Two Synchronous Serial Controllers (I2S mode)
  • – Four-channel 16-bit PWM Controller
  • – Two Two-wire Interfaces
  • – Four USARTs with ISO7816, IrDA, Manchester and SPI modes
  • – 8-channel 10-bit ADC with 4-wire Touch Screen support
  • – Write Protected Registers
  • System
  • – 133 MHz twelve 32-bit layer AHB Bus Matrix
  • – 37 DMA Channels
  • – Boot from NAND Flash, SDCard, DataFlash® or serial DataFlash
  • – Reset Controller with on-chip Power-on Reset
  • – Selectable 32768 Hz Low-power and 12 MHz Crystal Oscillators
  • – Internal Low-power 32 kHz RC Oscillator
  • – One PLL for the system and one 480 MHz PLL optimized for USB High Speed
  • – Two Programmable External Clock Signals
  • – Advanced Interrupt Controller and Debug Unit
  • – Periodic Interval Timer, Watchdog Timer, Real Time Timer and Real Time Clock
  • – Five 32-bit Parallel Input/Output Controllers
  • – 160 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os with Schmitt trigger input
  • Package
  • – 324-ball TFBGA, pitch 0.8 mm

Specifiche

Source Content uid AT91SO100 Part Life Cycle Code Active
Reach Compliance Code compliant ECCN Code 3A991.A.2
HTS Code 8542.31.00.01 Has ADC NO
Address Bus Width 24 Bit Size 32
Boundary Scan NO CPU Family SC100
Clock Frequency-Max 50 MHz DAC Channels NO
DMA Channels NO External Data Bus Width 16
Format FIXED POINT Integrated Cache YES
JESD-30 Code S-PBGA-B256 Length 15 mm
Low Power Mode YES Number of I/O Lines 40
Number of Serial I/Os 2 Number of Terminals 256
Number of Timers 2 On Chip Data RAM Width 8
On Chip Program ROM Width 8 PWM Channels NO
RAM (bytes) 102400 ROM (words) 262144
ROM Programmability EEPROM Seated Height-Max 1.25 mm
Supply Voltage-Max 3.63 V Supply Voltage-Min 2.97 V
Supply Voltage-Nom 3.3 V Surface Mount YES
Technology CMOS Terminal Form BALL
Terminal Pitch 0.8 mm Terminal Position BOTTOM
Width 15 mm uPs/uCs/Peripheral ICs Type MICROCONTROLLER, RISC
Product Category ARM Microcontrollers - MCU Series 91S
Mounting Style SMD/SMT Core ARM SC100
Program Memory Size 256 kB Data Bus Width 32 bit
ADC Resolution No ADC Maximum Clock Frequency 50 MHz
Number of I/Os 40 I/O Data RAM Size 96 kB
Supply Voltage - Min 2.97 V Supply Voltage - Max 3.63 V
Minimum Operating Temperature 0 C Maximum Operating Temperature + 70 C
Height 0.53 mm Interface Type SPI, UART, USB
Number of Timers/Counters 3 Timer Product Type ARM Microcontrollers - MCU
Program Memory Type EPROM Subcategory Microcontrollers - MCU
Unit Weight 0.098203 oz

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