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AM79C970 +BOM

PCnetTM-PCISingle-ChipEthernetControllerforPCILocalBus

Produttore:

XILINX
ProduttorePart #:

AM79C970
Scheda dati:

AM79C970 Scheda dati (PDF)
Pacchetto/custodia:

QFP
EDA/CAD Modelli:

Richiedi modelli CAD gratuiti per AM79C970

AM79C970 Descrizione generale

GENERAL DESCRIPTIONThe PCnet-PCI single-chip 32-bit Ethernet controller is a highly integrated Ethernet system solution designed to address high-performance system application requirements. It is a flexible bus-mastering device that can be used in any application, including network-ready PCs, printers, fax modems, and bridge/router designs.DISTINCTIVE CHARACTERISTICS■Single-chip Ethernet controller for the Periph eral Component Interconnect (PCI) local bus■Supports ISO 8802-3 (IEEE/ANSI 802.3) and Ethernet Standards■Direct interface to the PCI local bus■Compliant to PCI local bus specification(Revision 2.0)■Software compatible with AMD’s Am7990 LANCE, Am79C90 C-LANCE, Am79C960 PCnet-ISA, Am79C961 PCnet-ISA+, Am79C965 PCnet-32, and Am79C900 ILACCTM register and descriptor architecture■Compatible with Am2100/Am1500T and Novell NE2100/NE1500 driver software■High-performance Bus Master architecture with integrated DMA Buffer Management Unit for low CPU and bus utilization■Big endian byte alignment supported■Single +5 V power supply operation■Low-power, CMOS design with sleep modes allows reduced power consumption for critical battery powered applications and Green PCs■MicrowireTM EEPROM interface supports jumperless design■Individual 136-byte transmit and 128-byte receive FIFOs provide frame buffering for increased system latency, and support the following features:— Automatic retransmission with no FIFO reload— Automatic receive stripping and transmit padding (individually programmable)— Automatic runt packet rejection— Automatic deletion of received collision frames■Look-Ahead Packet Processing (LAPP) concept allows protocol analysis to begin before end of receive frame■Integrated Manchester Encoder/Decoder■Provides integrated Attachment Unit Interface (AUI) and 10BASE-T transceiver with automatic port selection■Automatic Twisted-Pair receive polarity detection and automatic correction of the receive polarity■Optional byte padding to long-word boundary on receive■Dynamic transmit FCS generation programmable on a frame-by-frame basis■Internal/external loopback capabilities■Supports the following types of network interfaces:— AUI to external 10BASE2, 10BASE5,10BASE-T or 10BASE-F MAU— Internal 10BASE-T transceiver with Smart Squelch to Twisted-Pair medium■NAND Tree test mode for connectivity testing on printed circuit boards■132-pin PQFP package

Caratteristiche principali

Single-chip Ethernet controller for the Periph eral Component Interconnect (PCI) local bus
Supports ISO 8802-3 (IEEE/ANSI 802.3) and Ethernet Standards
Direct interface to the PCI local bus
Compliant to PCI local bus specification(Revision 2.0)
Software compatible with AMD’s Am7990
LANCE, Am79C90 C-LANCE, Am79C960
PCnet-ISA, Am79C961 PCnet-ISA+, Am79C965
PCnet-32, and Am79C900 ILACC
register and descriptor architecture
Compatible with Am2100/Am1500T and Novell NE2100/NE1500 driver software
High-performance Bus Master architecture with integrated DMA Buffer Management Unit for low CPU and bus utilization
Big endian byte alignment supported
Single +5 V power supply operation
Low-power, CMOS design with sleep modes allows reduced power consumption for critical battery powered applications and Green PCs
MicrowireTM EEPROM interface supports jumperless design
Individual 136-byte transmit and 128-byte receive FIFOs provide frame buffering for increased system latency, and support the following features:
— Automatic retransmission with no FIFO reload
— Automatic receive stripping and transmit padding (individually programmable)
— Automatic runt packet rejection
— Automatic deletion of received collision frames
Look-Ahead Packet Processing (LAPP) concept allows protocol analysis to begin before end of receive frame
Integrated Manchester Encoder/Decoder
Provides integrated Attachment Unit Interface (AUI) and 10BASE-T transceiver with automatic port selection
Automatic Twisted-Pair receive polarity detection and automatic correction of the receive polarity
Optional byte padding to long-word boundary on receive
Dynamic transmit FCS generation programmable on a frame-by-frame basis
Internal/external loopback capabilities
Supports the following types of network interfaces:
— AUI to external 10BASE2, 10BASE5,10BASE-T or 10BASE-F MAU
— Internal 10BASE-T transceiver with Smart Squelch to Twisted-Pair medium
NAND Tree test mode for connectivity testing on printed circuit boards
132-pin PQFP package

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